| 摘要 |
<p>The Advanced Encryption Standard (AES) is defined by FIPS Publication #197 (2001). From the cryptographic perspective, AES is widely believed to be secure and efficient, and is therefore broadly accepted as the standard for both government and industry applications. If fact, almost any new protocol requiring symmetric encryption supports AES, and many existing systems that were originally designed with other symmetric encryption algorithms are being converted to AES. Given the popularity of AES and its expected long term importance, improving AES performance arid security has significant benefits for the PC client and server platforms. A new set of instructions is introduced into the next generation of processors family, starting from the processor called Westmere. The new architecture has six instructions: four instructions (AESENC, AESENCLAST, AESDEC, and AESDELAST facilitate high performance AES encryption and decryption, and the other two (AESIMC and AESKEYGENASSIST) support the AES key expansion. In addition, all six instructions are promoted to a non-destructive destination version (namely VAESENC, VAESENCLAST, VAESDEC, VAESDELAST, VAESIMC, and VAESKEYGENASSIST. Together, these instructions provide full hardware support for AES, offering high performance, enhanced security, and a great deal of software usage flexibility. The new AES instructions can support AES encryption and decryption with each one of the standard key lengths (128,192, and 256 bits), using the standard block size of 128 bits (and potentially also other block sizes for generalized variants such as the RIJNDAEL algorithms). They are well suited to all common uses of AES, including bulk encryption/decryption using cipher modes such as ECB, CBC and CM, data authentication using CBC-MACs, random number generation using algorithms such as CTR-DPBG, and authenticated encryption using modes such as GCM.</p> |
