发明名称 TRACKING DEFERRED DATA TRANSFERS ON A SYSTEM-INTERCONNECT BUS
摘要 Systems and techniques to track deferred data transfers on a system-interconnect bus. A deferral response initiates storage of information corresponding to the response and tracking of progress for a requested data transfer. A master device, such as a bus adapter, may include a split-transaction repository, timers, and a split-transaction monitor. The master device may include both hardware and firmware components, and may be designed to handle split responses as defined by a Peripheral Component Interconnect Extended standard.
申请公布号 KR100997841(B1) 申请公布日期 2010.12.01
申请号 KR20047008864 申请日期 2002.12.10
申请人 发明人
分类号 G06F13/38;G06F13/00;G06F13/36;G06F17/00 主分类号 G06F13/38
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