发明名称 BROADBAND PILOT CHANNEL ESTIMATION USING A REDUCED ORDER FFT AND A HARDWARE INTERPOLATOR
摘要 Within a receiver, a channel estimation mechanism involves a hardware interpolator. In a first mode, narrowband pilot values are analyzed to generate channel parameters that are supplied to the interpolator such that the interpolator generates channel estimate values. The channel estimate values are used to demodulate a tile of a frame. In a second mode, broadband pilot values are supplied to an IFFT, thereby generating time domain values. After time domain processing, an FFT is employed to generate intermediate channel estimate values. These intermediate values are analyzed to determine channel parameters, which in turn are supplied to the hardware interpolator so that the interpolator generates a larger number of channel estimate values. After phase adjustment, the channel estimate values are used in demodulation. Use of the interpolator in the broadband mode allows the FFT employed to be of a smaller order, and to consume less power and/or processing resources.
申请公布号 KR20100126582(A) 申请公布日期 2010.12.01
申请号 KR20107024257 申请日期 2009.03.17
申请人 QUALCOMM INCORPORATED 发明人 BUDIANU PETRU CRISTIAN;CHAUDHURI ARUNAVA;CHALLA RAGHU N.
分类号 H04L25/02;H04B1/06 主分类号 H04L25/02
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