发明名称 Configurable data processing device with bit reordering on inputs and outputs of configurable logic function blocks
摘要 A data processing device has a configurable functional unit for executing an instruction according to a configurable function. The configurable functional unit has a plurality of independent configurable logic blocks for performing programmable logic operations to implement the configurable function. Configurable connection circuits are provided between the configurable logic blocks and both the inputs and the outputs of the configurable functional unit. This allows an optimalization of the distribution of logic functions over the configurable logic blocks.
申请公布号 US7844803(B2) 申请公布日期 2010.11.30
申请号 US20010023117 申请日期 2001.12.17
申请人 KONINKLIJKE PHILIPS ELECTRONICS N.V. 发明人 DE OLIVEIRA KASTRUP PEREIRA BERNARDO;HOOGERBRUGGE JAN
分类号 G06F9/30;H03K19/173;G06F9/318;G06F9/38 主分类号 G06F9/30
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