发明名称 DESIGN METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT IN CONSIDERATION OF IRREGULARITY
摘要 PROBLEM TO BE SOLVED: To provide a design method for a semiconductor integrated circuit in consideration of irregularity of transistor characteristics due to a small number of discrete charges. SOLUTION: The method comprises a step of determining a probability density function P1(x) of displacement x of transistor characteristics generated by application of a single charge, and a step of determining a design margin M to be taken into consideration in circuit design based on the P1(x) and appearance probability of the number n of charges to be applied. Thereby, irregularity is calculated accurately in such a semiconductor integrated circuit having a minute transistor that a single charge influences its characteristics. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2010267905(A) 申请公布日期 2010.11.25
申请号 JP20090119754 申请日期 2009.05.18
申请人 RENESAS ELECTRONICS CORP 发明人 TAKEUCHI KIYOSHI
分类号 H01L29/78;H01L21/336;H01L21/82;H01L21/8242;H01L21/8247;H01L27/10;H01L27/108;H01L27/115;H01L29/00;H01L29/786;H01L29/788;H01L29/792 主分类号 H01L29/78
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