发明名称 PLL circuit and radio communication terminal apparatus using the same
摘要 <p>A PLL circuit and a radio communication terminal apparatus using the PLL circuit is provided. In the PLL circuit, the number of n pieces of LPFs which have been required is reduced to only one LPF, so that the PLL circuit can reduce a mounting area and the number of pins, and can simplify its design. The PLL circuit according to the present invention comprises a variable-gain phase comparator 1, a mixer 2, an LPF 3, n pieces of VCOs 4-1 to 4n, n pieces of couplers 5-1 to 5-n, and a control circuit 6 for controlling the on/off of the operation of the VCOs. The variable-gain phase comparator 1 is a phase comparator capable of varying a phase difference gain. By the control circuit 6, the on/off of the operation of the VCOs 4-1 to 4n and one of the VCOs 4-1 to 4-n is operated in accordance with a desired operation frequency band; other VCOs are controlled to an off state. The phase difference conversion gain is varied in accordance with the sensitivity of the VCOs 4-1 to 4-n, and thereby, the number of LPF required for the PLL circuit can be reduced to only one. </p>
申请公布号 EP1758255(A3) 申请公布日期 2010.11.24
申请号 EP20060017995 申请日期 1999.09.14
申请人 RENESAS ELECTRONICS CORPORATION;TTPCOM LIMITED 发明人 YAMAWAKI, TAIZO;ENDO, TAKEFUMI;WATANABE, KAZUO;HORI, KAZUAKI;HILDERSLEY, JULIAN
分类号 H03L7/10;H04B1/40;H03D13/00;H03L7/00;H03L7/08;H03L7/085;H03L7/093;H03L7/099;H03L7/16;H03L7/18;H04L7/033 主分类号 H03L7/10
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