发明名称 Layout schemes and methods of power gating transistor switches, semiconductor devices including the power gating transistor switches, and power gating methods of the semiconductor devices
摘要 A semiconductor device may include a logic circuit and one or more power gating transistor switches. The logic circuit may be connected between a power voltage and a ground voltage, and may perform one or more logic operations. The one or more power gating transistor switches may include a plurality of power gating transistors and poly resistors, and may switch application of the power voltage to the logic circuit according to an active mode, a sleep mode, or active and sleep modes of the logic circuit. The one or more power gating transistor switches may use the poly resistors to sequentially apply the power voltage to the logic circuit, to sequentially block the application of the power voltage to the logic circuit, or to sequentially apply the power voltage to the logic circuit and to sequentially block the application of the power voltage to the logic circuit.
申请公布号 US7840926(B2) 申请公布日期 2010.11.23
申请号 US20070812577 申请日期 2007.06.20
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KIM KWANG-IL;CHAE KYOUNG-KUK
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
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