Duty cycle correction circuits including a transition generator circuit for generating transitions in a duty cycle corrected signal responsive to an input signal and a delayed version of the input signal and methods of operating the same

摘要

A duty cycle correction circuit is operated by maintaining a state of a duty cycle corrected signal, generating a first transition in the state of the duty cycle corrected signal responsive to an input signal, and generating a second transition in the state of the duty cycle corrected signal responsive to a delayed version of the input signal.