| 摘要 |
FIELD: physics. ^ SUBSTANCE: device also includes an analogue adder, an AND circuit, as well as a second group of units containing series-connected read-only memory unit, analogue-digital multiplier, analogue integrator with reset and unit for detecting signal absolute value. Inputs of the read-only memory unit are connected to outputs of an address generation counter. Outputs of the unit for detecting signal absolute value are connected to inputs of the analogue adder, and inputs of the AND circuit are connected to outputs of a cycle counter. ^ EFFECT: faster operation of the device. ^ 1 dwg |
