发明名称 PROCESSOR
摘要 PROBLEM TO BE SOLVED: To provide a processor capable of enhancing efficiency of time for operating an arithmetic unit to thereby improve performance of serial processing. SOLUTION: The processor 1 has: a clock control circuit 21 which outputs a control clock signal ECLK generated on the basis of a supplied clock signal CLK according to a control signal S_CYCLE for controlling the clock signal CLK; and a plurality of serially connected ALUs 22-25. In an operation stage where a plurality of operations are executed by the plurality of ALUs 22-25, the plurality of operations to be serially executed are executed in one execution cycle by changing execution cycles on the basis of the control clock signal ECLK from the clock control circuit 21. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2010262600(A) 申请公布日期 2010.11.18
申请号 JP20090114896 申请日期 2009.05.11
申请人 TOSHIBA CORP 发明人 OIKAWA KOHEI
分类号 G06F9/30 主分类号 G06F9/30
代理机构 代理人
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