RECEIVING DEVICE AND DEMODULATION METHOD

摘要

Disclosed is a receiving device with which increases in circuit areas and cost, which are required for appropriate sampling, can be prevented. An A/D converter (2) converts a coherent signal serving as an analog signal into a digital signal by sampling in synchronization with a sampling clock signal. A DSP (3) demodulates the digital signal converted by the A/D converter (2), and calculates a phase of the sampling clock signal at which the error rate of the digital signal is minimized on the basis of the demodulated digital signal. A sampling clock extracting circuit (4) extracts a clock signal at the symbol rate of the coherent signal from the coherent signal. A phase adjusting circuit (5) adjusts the phase of the clock signal extracted by the sampling clock extracting circuit (4) to the phase calculated by the DSP (3), and generates the clock signal of which phase was adjusted as the sampling clock signal.