| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To solve such a problem that, when the memory controller is powered off, a RESET signal cannot be used to keep a memory device in a self-refresh mode, thereby jeopardizing the integrity of the data stored in the memory device. <P>SOLUTION: In memory circuitry, to ensure that a memory device, such as a DDR3 RDIMM, safely operates in the self-refresh mode while the memory controller is powered down and off, the memory device's clock enable (CKE) input is connected to both (i) a CKE signal applied by the memory controller and (ii) a termination voltage provided by the power module. To power down the memory controller, the memory controller drives the CKE signal low, then the power module drives the termination voltage low, then the power module powers down the memory controller. In order to resume normal operations, the power module powers up the memory controller, then the memory controller drives the CKE signal low, then the power module powers up the termination voltage. <P>COPYRIGHT: (C)2011,JPO&INPIT</p> |
