发明名称 System and Method for Designing Cell Rows
摘要 A system and method for designing integrated circuits is disclosed. An embodiment comprises placing a standard cell with a first cell height into a cell row with a different height. The standard cell may have a height smaller than the cell row or else may have a height that is larger than the cell row. Vertical fillers and horizontal fillers are utilized to extend and connect the standard cell to adjacent cells without having to redesign the entire cell row.
申请公布号 US2010289111(A1) 申请公布日期 2010.11.18
申请号 US20100707347 申请日期 2010.02.17
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 LEE YUN-HAN;KUO WU-AN
分类号 H01L23/544;G06F17/50 主分类号 H01L23/544
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