发明名称 Multi-processor system
摘要 A serial communication interface (SCI) cable 4 is provided between the slave processor 2 and the master processor 3. Both processors are connected with a communication interface for peripheral units (SPI: Serial Peripheral Interface) which enables fast transmission. The slave processor 2 transmits a transmission request command which requests at least one of data transmission and reception from the command communication section 220 to the master processor 3 through the SCI cable 4. The master processor 3 transfers data to and from the slave processor 2 in communication with the slave processor 2 by means of the data communication section 310 through the fast SPI cable 5 in response to a transmission request command sent from the slave processor 2 With this, the processing ability of a multi-processor system can be increased.
申请公布号 US7836233(B2) 申请公布日期 2010.11.16
申请号 US20030642755 申请日期 2003.08.19
申请人 HITACHI, LTD. 发明人 TSUNEDOMI KUNIHIKO;YOSHIMURA KENTARO;KANEKAWA NOBUYASU;YOKOYAMA TAKANORI;WATABE MITSURU
分类号 G06F13/00;G06F13/38;G05B19/042 主分类号 G06F13/00
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