发明名称 Method for fabricating a semiconductor device having recessed gate electrode and elevated source and drain regions
摘要 A method for fabricating a semiconductor device, the method includes forming an isolation layer defining an active region over a substrate, forming a conductive layer over the substrate including the isolation layer, patterning the conductive layer to form a conductive pattern over the active region defined on both sides of a gate region, forming insulation spacers on a sidewall of the conductive pattern, forming a conductive layer for a gate electrode and a gate hard mask layer over the resulting structure including the conductive pattern, and patterning the gate hard mask layer and the conductive layer for the gate electrode to form a gate in the gate region of the substrate.
申请公布号 US7833868(B2) 申请公布日期 2010.11.16
申请号 US20080165228 申请日期 2008.06.30
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KANG KYUNG-DOO
分类号 H01L21/336;H01L29/78 主分类号 H01L21/336
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