发明名称 |
On-chip service processor |
摘要 |
An integrated circuit is described that includes a stored program processor for test and debug of user-definable logic plus external interface between the test/debug circuits and the component pins. The external interface may be via an existing test interface or a separate serial or parallel port. Test and debug circuits may contain scan strings that may be used to observe states in user-definable logic or be used to provide pseudo-random bit sequences to user-definable logic. Test and debug circuits may also contain an on-chip logic analyzer for capturing sequences of logic states in user-definable circuits. Test and debug circuits may be designed to observe states in user-definable circuits during the normal system operation of said user-definable circuits.
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申请公布号 |
US7836371(B2) |
申请公布日期 |
2010.11.16 |
申请号 |
US20060424610 |
申请日期 |
2006.06.16 |
申请人 |
DERVISOGLU BULENT;COOKE LAURENCE H;ARAT VACIT |
发明人 |
DERVISOGLU BULENT;COOKE LAURENCE H.;ARAT VACIT |
分类号 |
G01R31/28;G01R31/317;G01R31/3185 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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