| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To suppress deterioration in reliability of each element by controlling potential of bit lines and improving characteristics of writing data into a memory cell with a low power supply voltage. <P>SOLUTION: A semiconductor storage device includes: memory cells 100 located at intersections of word lines and bit lines, pre-charge circuits 101 connected to the bit lines, column select circuits 102 controlled by a write control signal, and a clamp circuits 103A prepared as a write circuit. The clamp circuit 103A has a transistor QN17 for controlling the voltage of the selected bit line to the first voltage (for example, 0V), and a variable capacity element C11 for controlling the voltage of the selected bit line to the second voltage lower than the first voltage (for example, negative voltage). The variable capacity element C11 is used, and thus the element capacity decreases when the power supply voltage becomes high. Therefore, the amount of decrease from the first voltage to the second voltage is suppressed. <P>COPYRIGHT: (C)2011,JPO&INPIT</p> |
