发明名称 COMPUTER
摘要 PROBLEM TO BE SOLVED: To provide a computer monitoring interrupts from a plurality of data sources and performing transfer of data without missing. SOLUTION: The computer 100 includes: a plurality of data buffer circuits 4-1 to 4-N for temporarily holding a plurality of pieces of the data and sending them to an MPU (Micro Processing Unit); a plurality of interrupt signal edge detection circuits 2-1 to 2-N sequentially detecting change points from interrupt request signals from the data sources 1-1 to 1-N and generating edge signals; a plurality of FIFO (First In First Out) buffer circuits 3-1 to 3-N temporarily holding the edge signals from the interrupt signal edge detection circuits 2-1 to 2-N; an interrupt sampler circuit 5 registering outputs of the FIFO buffer circuits 3-1 to 3-N into a queue; and an interrupt controller 6 reading the queue of the interrupt sampler circuit 5 and generating an interrupt signal to the MPU 7. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2010257035(A) 申请公布日期 2010.11.11
申请号 JP20090103755 申请日期 2009.04.22
申请人 TOPPAN PRINTING CO LTD 发明人 KASAI NAOKI
分类号 G06F9/48 主分类号 G06F9/48
代理机构 代理人
主权项
地址