METHOD FOR SOI BODY CONTACT FET WITH REDUCED PARASITIC CAPACITANCE

摘要

PROBLEM TO BE SOLVED: To mount a body contact on a semiconductor-on-insulator device, thereby reducing parasitic capacitance in the device. SOLUTION: A substrate includes a semiconductor layer arranged so as to be covered on an insulating layer. The semiconductor layer includes the substrate including a semiconductor body and an separation region existing around the outer periphery of the semiconductor body, and a gate structure covered on the semiconductor layer of the substrate. A method for manufacturing a semiconductor device is provided. The semiconductor device includes the gate structure existing on a first part of an upper face of the semiconductor body and a silicide body contact directly physically brought into contact with a second part of the semiconductor body separated from the first part of the semiconductor body by a non-silicide semiconductor region. COPYRIGHT: (C)2011,JPO&INPIT