发明名称 Resistance variable memory device reducing word line voltage
摘要 A resistance variable memory device includes a memory cell array, a sense amplifier circuit, and a column selection circuit. The memory cell array includes a plurality of block units and a plurality of word line drivers, where each of the block units is connected between adjacent word line drivers and includes a plurality of memory blocks. The sense amplifier circuit includes a plurality of sense amplifier units, where each of the sense amplifier units provides a read current to a corresponding block unit and includes a plurality of sense amplifiers. The column selection circuit is connected between the memory cell array and the sense amplifier circuit and selects at least one of the plurality of memory blocks in response to a column selection signal to apply the read current from the sense amplifier circuit to the selected memory block.
申请公布号 US7830699(B2) 申请公布日期 2010.11.09
申请号 US20080245929 申请日期 2008.10.06
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 CHOI BYUNG-GIL;KIM DU-EUNG
分类号 G11C11/00 主分类号 G11C11/00
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