发明名称 |
Selective timer control during single-step instruction execution |
摘要 |
A processing device includes a timer and a processor core configured to execute an instruction during a debug session. The processing device further includes a timer control module configured to selectively enable/disable the timer based on a characteristic of the instruction. Another processing device includes a timer, a processor core configured to single step execute a sequence of instructions during a debug session, and a timer control module configured to selectively enable/disable the timer during single step execution of each instruction of the sequence of instructions.
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申请公布号 |
US7831862(B2) |
申请公布日期 |
2010.11.09 |
申请号 |
US20070668787 |
申请日期 |
2007.01.30 |
申请人 |
FREESCALE SEMICONDUCTOR, INC. |
发明人 |
MOYER WILLIAM C.;NEARING JASON T. |
分类号 |
G06F11/00 |
主分类号 |
G06F11/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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