发明名称 Contemporaneous margin verification and memory access for memory cells in cross point memory arrays
摘要 Circuitry and methods for restoring data values in non-volatile memory are disclosed. An integrated circuit includes a memory access circuit and a sensing circuit configured to sense a data signal during a read operation to at least one two-terminal non-volatile cross-point memory array. Each memory array includes a plurality of two-terminal memory cells. A plurality of the memory arrays can be fabricated over the substrate and vertically stacked on one another. Further, the integrated circuit can include a margin manager circuit configured to manage a read margin for the two-terminal memory cells substantially during the read operation, thereby providing for contemporaneous read and margin determination operations. Stored data read from the two-terminal memory cells may have a value of the stored data restored (e.g., re-written to the same cell or another cell) if the value is not associated with a read margin (e.g., a hard programmed or hard erased state).
申请公布号 US7830701(B2) 申请公布日期 2010.11.09
申请号 US20080284227 申请日期 2008.09.19
申请人 UNITY SEMICONDUCTOR CORPORATION 发明人 SIAU CHANG HUA;CHEVALLIER CHRISTOPHE J.
分类号 G11C11/00 主分类号 G11C11/00
代理机构 代理人
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