发明名称
摘要 A semiconductor test program debugging apparatus is provided which generates, in a simulatory manner, a signal that a DUT should output when receiving a test signal, and which generates, in a simulatory manner, an analog waveform that should be output from the analog output terminal, when an analog waveform acquisition instruction that is included in a semiconductor test program has been executed.
申请公布号 JP4574894(B2) 申请公布日期 2010.11.04
申请号 JP20010139623 申请日期 2001.05.10
申请人 发明人
分类号 G01R35/00;G01R31/28;G01R31/316;G01R31/317;G01R31/3183;G06F11/22;G06F11/26;G06F12/16 主分类号 G01R35/00
代理机构 代理人
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