发明名称 |
Threshold Voltage Adjustment Through Gate Dielectric Stack Modification |
摘要 |
Multiple types of gate stacks are formed on a doped semiconductor well. A high dielectric constant (high-k) gate dielectric is formed on the doped semiconductor well. A metal gate layer is formed in one device area, while the high-k gate dielectric is exposed in other device areas. Threshold voltage adjustment oxide layers having different thicknesses are formed in the other device areas. A conductive gate material layer is then formed over the threshold voltage adjustment oxide layers. One type of field effect transistors includes a gate dielectric including a high-k gate dielectric portion. Other types of field effect transistors include a gate dielectric including a high-k gate dielectric portion and a first threshold voltage adjustment oxide portions having different thicknesses. Field effect transistors having different threshold voltages are provided by employing different gate dielectric stacks and doped semiconductor wells having the same dopant concentration.
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申请公布号 |
US2010276753(A1) |
申请公布日期 |
2010.11.04 |
申请号 |
US20090432927 |
申请日期 |
2009.04.30 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
GREENE BRIAN J.;CHUDZIK MICHAEL P.;HAN SHU-JEN;HENSON WILLIAM K.;LIANG YUE;MACIEJEWSKI EDWARD P.;NA MYUNG-HEE;NOWAK EDWARD J.;YU XIAOJUN |
分类号 |
H01L27/088;H01L21/8236;H01L27/092;H01L27/12 |
主分类号 |
H01L27/088 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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