发明名称 PHASE LOCK LOOP CIRCUITS
摘要 A phase lock loop circuit is provided. A phase frequency detector detects a phase difference between a feedback signal and a reference signal, and generates a phase error signal in response to the detected phase difference. A charge pump consists of at least one core device and outputs a current signal based on the phase error signal. An active loop filter receives and transfers the current signal into a control signal. Operating voltage of the active loop filter is higher than operating voltage of the charge pump. A controlled oscillator receives the control signal and generates an output signal in response to the control signal. A feedback divider receives the output signal to generate the feedback signal.
申请公布号 US2010277245(A1) 申请公布日期 2010.11.04
申请号 US20090431842 申请日期 2009.04.29
申请人 MEDIATEK INC. 发明人 LIU SHIUE-SHIN
分类号 H03L7/00 主分类号 H03L7/00
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