| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device having a protection circuit inducing no error of an internal circuit. SOLUTION: The semiconductor device 1 is provided with: a P-type Si substrate 101; an ESD protection element 1A; and a protected element 1B. The ESD protection element 1A is provided with: a source N-type diffusion region 107A; and a high concentration P-type diffusion region 103 covering the source N-type diffusion region 107A within the P-type Si substrate 101, formed from under the source N-type diffusion region 107A to at least a part under a gate electrode 106A, and having a P-type impurity concentration higher than that of a basic region of the P-type Si substrate 101. The protected element 1B is provided with: a drain N-type diffusion region 108B; and a low concentration P-type diffusion region 104 contacting with the drain N-type diffusion region 108B within the P-type Si substrate 101. A drain electrode 112A of the ESD protection element 1A and a drain electrode 112B of the protected element 1B are connected, and the high concentration P-type diffusion region 103 has the P-type impurity concentration higher than that of the low concentration P-type diffusion region 104. COPYRIGHT: (C)2011,JPO&INPIT
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