发明名称 Strained layers within semiconductor buffer structures
摘要 A semiconductor workpiece including a substrate, a relaxed buffer layer including a graded portion formed on the substrate, and at least one strained transitional layer within the graded portion of the relaxed buffer layer and method of manufacturing the same. The at least one strained transitional layer reduces an amount of workpiece bow due to differential coefficient of thermal expansion (CTE) contraction of the relaxed buffer layer relative to CTE contraction of the substrate.
申请公布号 US7825401(B2) 申请公布日期 2010.11.02
申请号 US20090562029 申请日期 2009.09.17
申请人 ASM AMERICA, INC.;S.O.I. TEC SILICON ON INSULATOR TECHNOLOGIES, S.A. 发明人 CODY NYLES W.;FIGUET CHRISTOPHE;KENNARD MARK
分类号 H01L29/06 主分类号 H01L29/06
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