发明名称 Method to secure an electronic assembly against attacks by error introduction
摘要 The invention concerns a method to secure an electronic assembly implementing any algorithm against attacks by error introduction. The method according to the invention consists in performing an additional calculation using a verification function on at least one intermediate result in order to obtain a calculation signature and in performing a least once more all or part of the calculation in order to recalculate said signature and compare them in order to detect a possible error.
申请公布号 US7826610(B2) 申请公布日期 2010.11.02
申请号 US20030520806 申请日期 2003.07.07
申请人 GEMALTO SA 发明人 AKKAR MEHDI-LAURENT;GOUBIN LOUIS
分类号 G06F1/00;H04K3/00;G06F7/38;G06F21/00;G06F21/52;H04K1/00;H04L9/06;H04L9/10 主分类号 G06F1/00
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