发明名称 NONVOLATILE SEMICONDUCTOR MEMORY APPARATUS COMPRISING CHARGE ACCUMULATION LAYER AND CONTROL GATE
摘要 A nonvolatile semiconductor memory apparatus includes memory cell strings, first and second bit lines, a first buffer, a second buffer, and a controlling unit. The memory cell strings each include memory cells. The first and second bit lines connected to the memory cell strings. The first buffer connects to the first bit line and holds first data. The second buffer connects to the second bit line and holds second data. The controlling unit includes first and second latches and controls timing to output the first and second data according to an internal terminal, a second signal, and a third signal, and transfers a control signal synchronized with the timing of the first and second data to the external terminal. The controlling unit allows the first latch to hold the first and second data, and transfers the first data, and thereafter transfers the second data.
申请公布号 US2010271882(A1) 申请公布日期 2010.10.28
申请号 US20100760866 申请日期 2010.04.15
申请人 TAKEUCHI YOSHIAKI 发明人 TAKEUCHI YOSHIAKI
分类号 G11C16/02;G11C7/10;G11C8/18 主分类号 G11C16/02
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