发明名称 LOW-LATENCY DECODER
摘要 In one embodiment, a signal-processing receiver has an upstream processor and a low-density parity-check (LDPC) decoder for decoding LDPC-encoded codewords. The upstream processor generates a soft-output value for each bit of the received codewords. The LDPC decoder is implemented to process the soft-output values without having to wait until all of the soft-output values are generated for the current codeword. Further, the LDPC code used to encode the codewords is arranged to support such processing. By processing the soft-output values without having to wait until all of the soft-output values are generated for the current codeword, receivers of the present invention may have a lower latency and higher throughput than prior-art receivers that wait until all of the soft-output values are generated prior to performing LDPC decoding. In another embodiment, the LDPC decoder processes the soft-output values as soon as, and in the order that, they are generated.
申请公布号 US2010275088(A1) 申请公布日期 2010.10.28
申请号 US20090427786 申请日期 2009.04.22
申请人 AGERE SYSTEMS INC. 发明人 GRAEF NILS
分类号 H03M13/05;G06F11/10 主分类号 H03M13/05
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