| 摘要 |
<p>A first resistor (R1) has a first terminal to which a first voltage (VH') is applied and a second terminal which is connected to an I/O terminal (P1). A second resistor (R2) has a first terminal to which the first voltage (VH') is applied. A tail current source (12) generates a predetermined tail current (Ia'). A current switch (10) receives data (PAT) to be transmitted to a second device (102) and selects the second terminal of the first resistor (R1) or the second terminal of the second resistor (R2) in accordance with the PAT value, so that the selected one is connected to the tail current source (12). A voltage divider circuit (DIV1) includes a third resistor (R3) and a fourth resistor (R4) arranged in series between the second terminal of the first resistor (R1) and the second terminal of the second resistor (R2). A load balancer (LB1) includes a fifth resistor (R5) having a first terminal to which a second voltage (VLB) is applied and a second terminal which is connected to the second terminal of the second resistor (R2).</p> |
