| 摘要 |
A field effect transistor includes: a channel layer 103 containing GaN or InGaN; a first electron-supplying layer 104 disposed over the channel layer 103 and containing InxAlyGa1-x-yN (0≦̸x<1, 0<y<1, 0<x+y<1); a first etch stop layer 105 disposed over the first electron-supplying layer 104 and containing indium aluminum nitride (InAlN); and a second electron-supplying layer 106 provided over the first etch stop layer 105 and containing InaAlbGa1-a-bN (0≦̸a<1, 0<b<1, 0<a+b<1). A first recess 111, which extends through the second electron-supplying layer 106 and the first etch stop layer 105 and having a bottom surface constituted of a section of the first electron-supplying layer 104, is provided in the second electron-supplying layer 106 and the first etch stop layer 105. A gate electrode 109 covers the bottom surface of the first recess 111 and is disposed in the first recess 111. The second electron-supplying layer is provided so as to overlap with regions of an interface between the first electron-supplying layer 104 and the channel layer 106 except a region thereof under the bottom surface of the first recess 111 covering the gate electrode 109.
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