| 摘要 |
A micro-processor includes a clock generator configured to generate a fetch clock, a decoding clock, an execution clock, and a write-back clock that are sequentially enabled; a volatile memory device configured to output pre-stored program data in response to the fetch clock; a command decoder configured to decode the program data in response to the decoding clock and generate a decoding command; an arithmetic device configured to perform an arithmetic operation according to the command of the decoding command in response to the execution clock; and a peripheral circuit device configured to be operated according to the command of the decoding command in response to the write-back clock.
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