发明名称 METHOD AND APPARATUS FOR CONTROLLING CLOCK FREQUENCY
摘要 PURPOSE: A method and an apparatus for controlling clock frequency are provided to reduce power consumption without the degradation of the response speed about the command outputted from host. CONSTITUTION: A CPU(20) generates a detection signal depending on the activation of interrupt signal. The clock signal having a first frequency or a secondary frequency higher than the first frequency in response to the detection signal which a frequency adjusting circuit(30) is outputted from the above CPU is supplied to the above CPU. When a data processing unit is a hard disk drive, the frequency adjusting circuit outputs a clock signal having the first frequency in response to the deactivated detection signal which is outputted from the above CPU to the above CPU in the idle state.
申请公布号 KR20100114987(A) 申请公布日期 2010.10.27
申请号 KR20090033457 申请日期 2009.04.17
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 LEE, JAE HYUN;JUN, WALTER
分类号 G06F1/08;G06F1/04 主分类号 G06F1/08
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