发明名称 METHOD AND APPARATUS FOR DECODING RECEIVED DATA SIGNALS
摘要 <p>Decoding logic is arranged to receive an encoded data signal. The decoding logic comprises a convolutional decoder arranged to perform convolutional decoding on the encoded data signal, to produce a decoded data signal. The decoding logic comprises header bit prediction logic arranged to predict a value for at least one header bit within the decoded data signal, and to provide the predicted value for the at least one header bit to the convolutional decoder to be applied during convolutional decoding.</p>
申请公布号 EP2243240(A1) 申请公布日期 2010.10.27
申请号 EP20080751147 申请日期 2008.02.11
申请人 FREESCALE SEMICONDUCTOR, INC. 发明人 VILLION, MATHIEU;POIRIER-CLARAC, LAURENCE;TARDY, PIERRE
分类号 H03M13/29;H03M13/00;H04L1/00 主分类号 H03M13/29
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