发明名称 Low area architecture in BCH decoder
摘要 An improvement to a key equation solver block for a BCH decoder, where the key equation solver block having a number of multiplier units specified by X, where: t*(7*t−1)/(codeword_len−3)≦̸X<(t+1), where t is a number of transmission errors for the key equation solver block to correct, and codeword_len is a length of a transmitted codeword to be decoded by the BCH decoder.
申请公布号 US7823050(B2) 申请公布日期 2010.10.26
申请号 US20060613529 申请日期 2006.12.20
申请人 LSICORPORATION 发明人 GASANOV ELYAR E.;ANDREEV ALEXANDER;NEZNANOV ILYA V.;PANTELEEV PAVEL A.;GASHKOV SERGEI
分类号 H03M13/00 主分类号 H03M13/00
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