发明名称 Parallel test fixture for mixed signal integrated circuits
摘要 The present invention provides a parallel test fixture for mixed signal integrated circuits (ICs). The fixture includes a multi-layer printed circuit board (PCB). The fixture includes: a test area, which is disposed on a central area of the multi-layer PCB and includes several test regions for a plurality of mixed signal ICs; an analog signal ground layer, which is operationally connected with the analog signals of the mixed signal ICs in the test area; and a digital signal ground layer, which is operationally connected with the digital signals of the mixed signal ICs in the test area. Thereby, when a plurality of mixed signal ICs are parallel tested, not only the problem due to cross-talk could be solved but also the numbers of the layers of the multi-layer PCB could be reduced effectively.
申请公布号 US7821277(B2) 申请公布日期 2010.10.26
申请号 US20080144529 申请日期 2008.06.23
申请人 KING YUAN ELECTRONICS CO., LTD. 发明人 NI CHENG-CHIN
分类号 G01R31/02 主分类号 G01R31/02
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