| 摘要 |
An advanced method of patterning a gate stack including a high-k gate dielectric that is capped with a high-k gate dielectric capping layer such as, for example, a rare earth metal (or rare earth like)-containing layer is provided. In particular, the present invention provides a method in which a combination of wet and dry etching is used in patterning such gate stacks which substantially reduces the amount of remnant high-k gate dielectric capping material remaining on the surface of a semiconductor substrate to a value that is less than 1010 atoms/cm2, preferably less than about 109 atoms/cm2.
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