发明名称 CRAM transistors with high immunity to soft error
摘要 A transistor fabricated on a semiconductor substrate includes a source and a drain in the substrate; a gate on the substrate, the gate being insulated from the substrate by gate dielectric; barrier layers covering two sides of the gate and the gate dielectric; spacers of high-k material covering the barrier layers; and nitride spacers covering the spacers of high-k material. The spacers of high-k material significantly increase the node capacitance of the transistor and therefore reduce the transistor's soft error rate.
申请公布号 US7821050(B1) 申请公布日期 2010.10.26
申请号 US20060497017 申请日期 2006.07.31
申请人 ALTERA CORPORATION 发明人 LIU YOWJUANG (BILL);HUANG CHENG-HSIUNG;SHIH CHIH-CHING
分类号 H01L27/108;H01L29/94 主分类号 H01L27/108
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