发明名称 Method for separately optimizing spacer width for two transistor groups using a recess spacer etch (RSE) integration
摘要 A method for making a semiconductor device is provided. In accordance with the method, a semiconductor structure is provided which comprises (a) a substrate (203), (b) first (219) and second (220) gate electrodes disposed over the substrate, and (c) first (223) and second (225) sets of spacer structures disposed adjacent to said first and second gate electrodes, respectively. A first layer of photoresist (231) is disposed over the structure such that the first set of spacer structures is exposed and the second set of spacer structures is covered. The structure is then subjected to an etch which etches the first layer of photoresist and a portion of the first and second sets of spacer structures.
申请公布号 US7820539(B2) 申请公布日期 2010.10.26
申请号 US20060364985 申请日期 2006.02.28
申请人 FREESCALE SEMICONDUCTOR, INC. 发明人 SRIVASTAVA ANADI
分类号 H01L21/3205;H01L21/4763 主分类号 H01L21/3205
代理机构 代理人
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