发明名称 Compilable, reconfigurable network processor
摘要 A processor, particularly a network processor, is designed by first writing code to be processed by the processor. That code is then electronically compiled to design hardware of the processor and to provide executable code for execution on the designed hardware. To facilitate compilation, the written code may be restricted by predefined functional units to be implemented in hardware, and the executable code may include very long instruction word code. The functional units may be implemented in reconfigurable circuitry or custom circuitry, and the designed hardware may include combinational logic in reconfigurable circuitry.
申请公布号 US7823091(B2) 申请公布日期 2010.10.26
申请号 US20060413133 申请日期 2006.04.27
申请人 FUTUREWEI TECHNOLOGIES, INC. 发明人 DENNISON LARRY R.;CHIOU DEREK
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
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