发明名称 SYSTEM, METHOD AND PROGRAM FOR VERIFYING WIRING
摘要 PROBLEM TO BE SOLVED: To simultaneously solve problems of complex wiring constraints on each board and of total skew in a wire passing through a plurality of boards. SOLUTION: Board data 11, external connection board data 12, inter-board connection information 13, and wiring constraints 14 are input in advance. When a system netlist creating unit 21 creates a system netlist 31 showing a theoretical connection relation of each board, an external connection tracing unit 22 extracts external connection information 32 based on the system netlist 31. An external load producing unit 23 produces an external dummy load 33 converted to a wire length or wire delay of the outside based on extracted external connection information 32. A wiring verification unit 24 performs verification of a wiring state of an entire board by using the produced external dummy load 33. This enables proper distribution of wiring constraints on each board and solution of the total skew simultaneously. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2010238170(A) 申请公布日期 2010.10.21
申请号 JP20090088253 申请日期 2009.03.31
申请人 NEC CORP 发明人 KUMAZAKI MASAHITO
分类号 G06F17/50;H05K3/00 主分类号 G06F17/50
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