| 摘要 |
PROBLEM TO BE SOLVED: To provide an architecture capable of avoiding an error by previously carrying out a predictive diagnosis of a defective memory cell having a small margin in an SRAM block with an acceleration test, and to provide a defective memory cell predictive diagnosis method. SOLUTION: In the SRAM block, an error in a memory cell having a small operating margin which is caused by a variation in threshold voltage is generated intentionally by an acceleration test, so as to previously perform a predictive diagnosis of an error that occurs during a normal operation. The acceleration test is selected among (1) word line voltage application time extension, (2) bit line charging time extension, (3) bit line voltage rise, (4) word line application voltage rise, and (5) memory cell power supply potential drop. A memory cell block for the acceleration test and a memory cell block for a normal operation are prepared in the SRAM block to carry out the acceleration test and a normal operation in parallel. Further, the acceleration test is carried out to a memory cell block in which an empty block with no normal operation performed therein occurs. COPYRIGHT: (C)2011,JPO&INPIT
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