发明名称 |
METHOD TO REDUCE TRENCH CAPACITOR LEAKAGE FOR RANDOM ACCESS MEMORY DEVICE |
摘要 |
A method is provided that includes forming a trench isolation structure in a dynamic random memory region (DRAM) of a substrate and patterning an etch mask over the trench structure to expose a portion of the trench structure. A portion of the exposed trench structure is removed to form a gate trench that includes a first corner formed by the substrate and a second corner formed by the trench structure. The etch mask is removed and the first corner of the gate trench is rounded to form a rounded corner. This is followed by the formation of an oxide layer over a sidewall of the gate trench, the first rounded corner, and the semiconductor substrate adjacent the gate trench. The trench is filled with a gate material.
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申请公布号 |
US2010264478(A1) |
申请公布日期 |
2010.10.21 |
申请号 |
US20100680017 |
申请日期 |
2010.03.25 |
申请人 |
AGERE SYSTEMS INC. |
发明人 |
ROSSI NACE M.;SINGH RANBIR;YUAN XIAOJUN |
分类号 |
H01L27/108;H01L21/02;H01L21/336;H01L21/762 |
主分类号 |
H01L27/108 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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