| 摘要 |
PROBLEM TO BE SOLVED: To provide a power supply clamping circuit that protects an internal circuit even in a latch-up test of C-V method. SOLUTION: The power supply clamping circuit is constituted of a plurality of clamping transistor units, with a drain being connected to a first power supply wiring L12, a source to a second power supply wiring L14, and the drain and source being formed in a clamping transistor forming region. The plurality of clamping transistor units have: a plurality of first clamping transistor units that have a metal silicide layer which continues to a substrate surface extending from an electrode connection of the drain region to the gate electrode; a metal silicide layer on the substrate surface that extends from the electrode connection of the drain region to the gate electrode; and a plurality of second clamp transistor units having a silicide block region in which a metal silicide layer is not partially formed, wherein the first and second clamp transistor units are dispersedly provided in the clamping transistor forming region. COPYRIGHT: (C)2011,JPO&INPIT |
