发明名称 DELAY LOCKED LOOP AND METHOD OF DRIVING DELAY LOCKED LOOP
摘要 Provided are a delay locked loop (DLL) having a pulse width detection circuit and a method of driving the DLL. The DLL includes a pulse width detection circuit and a delay circuit. The pulse width detection circuit receives a reference clock signal, detects a pulse width of the reference clock signal, and outputs the detection result as a pulse width detection result signal. The delay circuit receives and delays the reference clock signal, and outputs the delayed reference clock signal as an output clock signal. The delay circuit receives the pulse width detection result signal from the pulse width detection circuit, and controls a time delay in the reference clock signal in response to the pulse width detection result signal.
申请公布号 US2010264968(A1) 申请公布日期 2010.10.21
申请号 US20100722768 申请日期 2010.03.12
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KO JAE-HONG;RHO HO-HAK;KIM PAUL
分类号 H03L7/06 主分类号 H03L7/06
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