发明名称 Method for forming vias in a substrate
摘要 A method for forming vias in a substrate, including the following steps: (a) providing a substrate having a first surface and a second surface; (b) forming a groove on the substrate; (c) filling the groove with a conductive metal; (d) removing part of the substrate which surrounds the conductive metal, wherein the conductive metal is maintained so as to form an accommodating space between the conductive metal and the substrate; (e) forming an insulating material in the accommodating space; and (f) removing part of the second surface of the substrate to expose the conductive metal and the insulating material. In this way, thicker insulating material can be formed in the accommodating space, and the thickness of the insulating material in the accommodating space is even.
申请公布号 US7816265(B2) 申请公布日期 2010.10.19
申请号 US20080183140 申请日期 2008.07.31
申请人 ADVANCED SEMICONDUCTOR ENGINEERING, INC. 发明人 WANG MENG-JEN
分类号 H01L21/44 主分类号 H01L21/44
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