发明名称 Circuit for processing network packets
摘要 A circuit is provided for processing network packets. The circuit includes ports identified in a specification of the processing of the network packets. The specification specifies handlers that each include at least one collection of actions. The specification specifies a dependency between each pair of handlers for which the actions of one handler include a handle action for invoking the other handler. The circuit also includes one or more parallel units coupled to the ports. The parallel units process input network packets and generate output network packets. Each parallel unit corresponds to a respective independent set of the handlers and has a corresponding architecture that is either a pipeline or a cluster of threads. Each parallel unit includes a concurrent unit for each collection of the actions of each handler in the respective independent set. Each concurrent unit is another pipeline for implementing the actions of the collection.
申请公布号 US7817657(B1) 申请公布日期 2010.10.19
申请号 US20070818811 申请日期 2007.06.14
申请人 XILINX, INC. 发明人 ATTIG MICHAEL E.;BREBNER GORDON J.
分类号 H04L12/56 主分类号 H04L12/56
代理机构 代理人
主权项
地址