发明名称 CACHE CONTROL DEVICE AND CACHE CONTROL METHOD
摘要 <p>A cache control device (101) is provided with a cache allocation control unit (40) for allocating a plurality of ways (51) included in a cache memory (50) to a plurality of tasks executed by a plurality of processors (10 and 11). The cache allocation control unit (40) allocates an unallocated way included in one group (52) to any of a plurality of tasks executed by one of the processors (10 or 11) when the unallocated way which is not allocated to any task is included in the one group (52), and a way (51) allocated to a task executed by the one of the processors (10 or 11) is included in the one group (52).</p>
申请公布号 WO2010116431(A1) 申请公布日期 2010.10.14
申请号 WO2009JP06668 申请日期 2009.12.07
申请人 PANASONIC CORPORATION;HAYASHI, KUNIHIKO 发明人 HAYASHI, KUNIHIKO
分类号 G06F12/08 主分类号 G06F12/08
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