发明名称 DIFFERENTIAL AMPLIFIER
摘要 PROBLEM TO BE SOLVED: To reduce the DC offset voltage of a differential amplifier and to suppress reduction in output impedance. SOLUTION: The differential amplifier 50 includes: a differential amplification unit 1 which includes an Nch MOS transistor NMT1 for inputting an input voltage Vin+ and an Nch MOS transistor NMT2 for inputting an input voltage Vin- and making a differential pair with the Nch MOS transistor NMT1, outputs an output voltage Vout+ from the drain side of the Nch MOS transistor NMT2 and outputs an output voltage Vout- from the drain side of the Nch MOS transistor NMT1; and a feedback unit 2 which inputs the output voltage Vout+ and the output voltage Vout-, generates feedback currents Ivil1, Ivil2 obtained by converting the voltages into currents and respectively feeds back and inputs the feedback current Ivil1 to a node N22 and the feedback current Ivil2 to a node N21. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2010233084(A) 申请公布日期 2010.10.14
申请号 JP20090080061 申请日期 2009.03.27
申请人 TOSHIBA CORP 发明人 SAEGUSA SHIGETO
分类号 H03F3/34;H03F3/45 主分类号 H03F3/34
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